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Text File  |  1993-01-24  |  25KB  |  454 lines
  1. From Motorola's:
  2. --------------------------------------------------------------
  3. M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL (Section 8) 
  4. --------------------------------------------------------------
  5. Retyped by Subhuman/Epsilon
  6.  
  7.  
  8. Effective Address Calculation Times
  9. +--------------------------------------------------+-----------+-------+
  10. |                     Addressing Mode              | Byte,Word | Long  |
  11. +---------------+----------------------------------+-----------+-------+
  12. |               |           REGISTER               |           |       |
  13. | Dn            | Data Register Direct             |     0     |   0   |
  14. | An            | Address Register Direct          |     0     |   0   |
  15. +---------------+----------------------------------+-----------+-------+
  16. |               |           MEMORY                 |           |       |
  17. | (An)          | Address Register Indirect        |     4     |   8   |
  18. | (An)+         | Addr Reg Indirect w/Postincr     |     4     |   8   |
  19. +---------------+----------------------------------+-----------+-------+
  20. | -(An)         | Addr Reg Indirect w/Predecrement |     6     |   10  |
  21. | (d16,An)      | Addr Reg Indirect w/Displacement |     8     |   12  |
  22. +---------------+----------------------------------+-----------+-------+
  23. | (d8,An,Xn)*   | Addr Register Indirect w/Index   |     10    |   14  |
  24. | (xxx).W       | Absolute Short                   |     8     |   12  |
  25. +---------------+----------------------------------+-----------+-------+
  26. | (xxx).L       | Absolute Long                    |     12    |   16  |
  27. | (d8,PC)       | PC Indirect with Displacement    |     8     |   12  |
  28. +---------------+----------------------------------+-----------+-------+
  29. | (d16,PC,Xn)*  | PC Indirect with Index           |     10    |   14  |
  30. | #(data)       | Immediate                        |     4     |   8   |
  31. +---------------+----------------------------------+-----------+-------+
  32. *The size of the index register (Xn) does not affect execution time.
  33.  
  34.  
  35. Move Byte and Word Instruction Execution Times
  36. +-------------+---------------------------------------------------------------+
  37. |             |                           DESTINATION                         |
  38. +   SOURCE    +---------------------------------------------------------------+
  39. |             | Dn | An |(An)|(An)+|-(An)|(d16,An)|(d8,An,Xn)*|(xxx.W)|(xxx).L|
  40. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  41. | Dn          | 4  | 4  | 8  |  8  |  8  |   12   |    14     |  12   |  16   |
  42. | An          | 4  | 4  | 8  |  8  |  8  |   12   |    14     |  12   |  16   |
  43. | (An)        | 8  | 8  | 12 | 12  | 12  |   16   |    18     |  16   |  20   |
  44. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  45. | (An)+       | 8  | 8  | 12 | 12  | 12  |   16   |    18     |  16   |  20   |
  46. | -(An)       | 10 | 10 | 14 | 14  | 14  |   18   |    20     |  18   |  22   |
  47. | (d16,An)    | 12 | 12 | 16 | 16  | 16  |   20   |    22     |  20   |  24   |
  48. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  49. | (d8,An,Xn)* | 14 | 14 | 18 | 18  | 18  |   22   |    24     |  22   |  26   |
  50. | (xxx).W     | 12 | 12 | 16 | 16  | 16  |   20   |    22     |  20   |  24   |
  51. | (xxx).L     | 16 | 16 | 20 | 20  | 20  |   24   |    26     |  24   |  28   |
  52. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  53. | (d16,PC)    | 12 | 12 | 16 | 16  | 16  |   20   |    22     |  20   |  24   |
  54. | (d8,PC,Xn)* | 14 | 14 | 18 | 18  | 18  |   22   |    24     |  22   |  26   |
  55. | #(data)     | 8  | 8  | 12 | 12  | 12  |   16   |    18     |  16   |  20   |
  56. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  57. *The size of the index register (Xn) does not affect execution time.
  58.  
  59.  
  60. Move Long Instruction Execution Times
  61. +-------------+---------------------------------------------------------------+
  62. |             |                           DESTINATION                         |
  63. +   SOURCE    +---------------------------------------------------------------+
  64. |             | Dn | An |(An)|(An)+|-(An)|(d16,An)|(d8,An,Xn)*|(xxx.W)|(xxx).L|
  65. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  66. | Dn          | 4  | 4  | 12 | 12  | 12  |   16   |    18     |  16   |  20   |
  67. | An          | 4  | 4  | 12 | 12  | 12  |   16   |    18     |  16   |  20   |
  68. | (An)        | 12 | 12 | 20 | 20  | 20  |   24   |    26     |  24   |  28   |
  69. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  70. | (An)+       | 12 | 12 | 20 | 20  | 20  |   24   |    26     |  24   |  28   |
  71. | -(An)       | 14 | 14 | 22 | 22  | 22  |   26   |    28     |  26   |  30   |
  72. | (d16,An)    | 16 | 16 | 24 | 24  | 24  |   28   |    30     |  28   |  32   |
  73. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  74. | (d8,An,Xn)* | 18 | 18 | 26 | 26  | 26  |   30   |    32     |  30   |  34   |
  75. | (xxx).W     | 16 | 16 | 24 | 24  | 24  |   28   |    30     |  28   |  32   |
  76. | (xxx).L     | 20 | 20 | 28 | 28  | 28  |   22   |    34     |  32   |  36   |
  77. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  78. | (d,PC)      | 16 | 16 | 24 | 24  | 24  |   28   |    30     |  28   |  32   |
  79. | (d,PC,Xn)*  | 18 | 18 | 26 | 26  | 26  |   30   |    32     |  30   |  34   |
  80. | #(data)     | 12 | 12 | 20 | 20  | 20  |   24   |    26     |  24   |  28   |
  81. +-------------+----+----+----+-----+-----+--------+-----------+-------+-------+
  82. *The size of the index register (Xn) does not affect execution time.
  83.  
  84.  
  85. Standard Instruction Execution Times
  86. An - Address register operand
  87. Dn - Data register operand
  88. ea - An operand specified by an effective address
  89. M  - Memory effective address operand
  90. +-------------+-----------+------------+-----------+-----------+
  91. | Instruction |   Size    | op<ea>,An¹ | op<ea>,Dn | op Dn,<M> |
  92. +-------------+-----------+------------+-----------+-----------+
  93. |             | Byte,Word |     8+     |     4+    |     8+    |
  94. |  ADD/ADDA   +-----------+------------+-----------+-----------+
  95. |             |   Long    |     6+**   |     6+**  |    12+    |
  96. +-------------+-----------+------------+-----------+-----------+
  97. |             | Byte,Word |     -      |     4+    |     8+    |
  98. |  AND        +-----------+------------+-----------+-----------+
  99. |             |   Long    |     -      |     6+**  |    12+    |
  100. +-------------+-----------+------------+-----------+-----------+
  101. |             | Byte,Word |     6+     |     4+    |     -     |
  102. |  CMP/CMPA   +-----------+------------+-----------+-----------+
  103. |             |   Long    |     6+     |     6+    |     -     |
  104. +-------------+-----------+------------+-----------+-----------+
  105. |  DIVS       |     -     |     -      |   158+*   |     -     |
  106. +-------------+-----------+------------+-----------+-----------+
  107. |  DIVU       |     -     |     -      |   140+*   |     -     |
  108. +-------------+-----------+------------+-----------+-----------+
  109. |             | Byte,Word |     -      |     4***  |     8+    |
  110. |  EOR        +-----------+------------+-----------+-----------+
  111. |             |   Long    |     -      |     8***  |    12+    |
  112. +-------------+-----------+------------+-----------+-----------+
  113. |  MULS       |     -     |     -      |    70+*   |     -     |
  114. +-------------+-----------+------------+-----------+-----------+
  115. |  MULU       |     -     |     -      |    70+*   |     -     |
  116. +-------------+-----------+------------+-----------+-----------+
  117. |             | Byte,Word |     -      |     4+    |     8+    |
  118. |  OR         +-----------+------------+-----------+-----------+
  119. |             |   Long    |     -      |     6+**  |    12+    |
  120. +-------------+-----------+------------+-----------+-----------+
  121. |             | Byte,Word |     8+     |     4+    |     8+    |
  122. |  SUB        +-----------+------------+-----------+-----------+
  123. |             |   Long    |     6+**   |     6+**  |    12+    |
  124. +-------------+-----------+------------+-----------+-----------+
  125. Notes:
  126.     + add effective address calculation time
  127.     ¹ word or long only
  128.     * indicates maximum basic value added to word effective address time.
  129.    ** The base time of six clock periods is increased to eight if the
  130.       effective address mode is register direct or immediate (effective
  131.       address time should also be added).
  132.   *** Only available effective address mode is data register direct.
  133. DIVS, DIVU - The divide algorithm used by the MC68000 provides less than
  134.              10% difference between the best and worst case timings.
  135. MULS, MULU - The multiply algorithm requires 38+2n clocks where n is
  136.              defined as:
  137.                  MULU: n = the number of ones in the <ea>
  138.                  MULS: n = concatanate the <ea> with a zero as the LSB;
  139.                            n is the resultant number of 10 or 01 patterns
  140.                            in the 17-bit source; i.e., worst case happens
  141.                            when the source is $5555.
  142.  
  143.  
  144. Immediate Instruction Execution Times
  145. #  - Immediate operand
  146. Dn - Data register operand
  147. An - Address register operand
  148. M  - Memory operand
  149. +-------------+-----------+---------+---------+--------+
  150. | Instruction |   Size    | op #,Dn | op #,An | op #,M |
  151. +-------------+-----------+---------+---------+--------+
  152. |             | Byte,Word |    8    |    -    |   12+  |
  153. |  ADDI       +-----------+---------+---------+--------+
  154. |             |   Long    |    16   |    -    |   20+  |
  155. +-------------+-----------+---------+---------+--------+
  156. |             | Byte,Word |    4    |    4*   |    8+  |
  157. |  ADDQ       +-----------+---------+---------+--------+
  158. |             |   Long    |    8    |    8    |   12+  |
  159. +-------------+-----------+---------+---------+--------+
  160. |             | Byte,Word |    8    |    -    |   12+  |
  161. |  ANDI       +-----------+---------+---------+--------+
  162. |             |   Long    |   14    |    -    |   20+  |
  163. +-------------+-----------+---------+---------+--------+
  164. |             | Byte,Word |    8    |    -    |    8+  |
  165. |  CMPI       +-----------+---------+---------+--------+
  166. |             |   Long    |   14    |    -    |   12+  |
  167. +-------------+-----------+---------+---------+--------+
  168. |             | Byte,Word |    8    |    -    |   12+  |
  169. |  EORI       +-----------+---------+---------+--------+
  170. |             |   Long    |   16    |    -    |   20+  |
  171. +-------------+-----------+---------+---------+--------+
  172. |  MOVEQ      |   Long    |    4    |    -    |   -    |
  173. +-------------+-----------+---------+---------+--------+
  174. |             | Byte,Word |    8    |    -    |   12+  |
  175. |  ORI        +-----------+---------+---------+--------+
  176. |             |   Long    |   16    |    -    |   20+  |
  177. +-------------+-----------+---------+---------+--------+
  178. |             | Byte,Word |    8    |    -    |   12+  |
  179. |  SUBI       +-----------+---------+---------+--------+
  180. |             |   Long    |   16    |    -    |   20+  |
  181. +-------------+-----------+---------+---------+--------+
  182. |             | Byte,Word |    4    |    8*   |    8+  |
  183. |  SUBQ       +-----------+---------+---------+--------+
  184. |             |   Long    |    8    |    8    |   12+  |
  185. +-------------+-----------+---------+---------+--------+
  186.  
  187.  
  188. Single Operand Instruction Execution Times
  189. +-------------+-----------+----------+--------+
  190. | Instruction |   Size    | Register | Memory |
  191. +-------------+-----------+----------+--------+
  192. |             | Byte,Word |    4     |    8+  |
  193. |  CLR        +-----------+----------+--------+
  194. |             |   Long    |    6     |   12+  |
  195. +-------------+-----------+----------+--------+
  196. |  NBCD       |   Byte    |    6     |    8+  |
  197. +-------------+-----------+----------+--------+
  198. |             | Byte,Word |    4     |    8+  |
  199. |  NEG        +-----------+----------+--------+
  200. |             |   Long    |    6     |   12+  |
  201. +-------------+-----------+----------+--------+
  202. |             | Byte,Word |    4     |    8+  |
  203. |  NEGX       +-----------+----------+--------+
  204. |             |   Long    |    6     |   12+  |
  205. +-------------+-----------+----------+--------+
  206. |             | Byte,Word |    4     |    8+  |
  207. |  NOT        +-----------+----------+--------+
  208. |             |   Long    |    6     |   12+  |
  209. +-------------+-----------+----------+--------+
  210. |             | Byte,False|    4     |    8+  |
  211. |  Scc        +-----------+----------+--------+
  212. |             | Byte,True |    6     |    8+  |
  213. +-------------+-----------+----------+--------+
  214. |  TAS        |   Byte    |    4     |   14+  |
  215. +-------------+-----------+----------+--------+
  216. |             | Byte,Word |    4     |    4+  |
  217. |  TST        +-----------+----------+--------+
  218. |             |   Long    |    4     |    4+  |
  219. +-------------+-----------+----------+--------+
  220. + add effective address calculation time
  221.  
  222.  
  223. Shift/Rotate Instruction Execution Times
  224. +-------------+-----------+----------+--------+
  225. | Instruction |   Size    | Register | Memory |
  226. +-------------+-----------+----------+--------+
  227. |             | Byte,Word |  6 + 2n  |   8+   |
  228. |  ASR, ASL   +-----------+----------+--------+
  229. |             |   Long    |  8 + 2n  |   -    |
  230. +-------------+-----------+----------+--------+
  231. |             | Byte,Word |  6 + 2n  |   8+   |
  232. |  LSR, LSL   +-----------+----------+--------+
  233. |             |   Long    |  8 + 2n  |   -    |
  234. +-------------+-----------+----------+--------+
  235. |             | Byte,Word |  6 + 2n  |   8+   |
  236. |  ROR, ROL   +-----------+----------+--------+
  237. |             |   Long    |  8 + 2n  |   -    |
  238. +-------------+-----------+----------+--------+
  239. |             | Byte,Word |  6 + 2n  |   8+   |
  240. |  ROXR, ROXL +-----------+----------+--------+
  241. |             |   Long    |  8 + 2n  |   -    |
  242. +-------------+-----------+----------+--------+
  243. + add effective address calculation time for word operands
  244. n is the shift count
  245.  
  246.  
  247. Bit Manipulation Instruction Execution Times
  248. +-------------+-----------+-------------------+-------------------+
  249. |             |           |       Dynamic     |       Static      |
  250. | Instruction |   Size    +----------+--------+----------+--------+
  251. |             |           | Register | Memory | Register | Memory |
  252. +-------------+-----------+----------+--------+----------+--------+
  253. |             |   Byte    |    -     |   8+   |    -     |  12+   |
  254. |  BCHG       +-----------+----------+--------+----------+--------+
  255. |             |   Long    |    8*    |   -    |    12*   |   -    |
  256. +-------------+-----------+----------+--------+----------+--------+
  257. |             |   Byte    |    -     |   8+   |    -     |  12+   |
  258. |  BCLR       +-----------+----------+--------+----------+--------+
  259. |             |   Long    |   10*    |   -    |    14*   |   -    |
  260. +-------------+-----------+----------+--------+----------+--------+
  261. |             |   Byte    |    -     |   8+   |    -     |  12+   |
  262. |  BSET       +-----------+----------+--------+----------+--------+
  263. |             |   Long    |    8*    |   -    |    12*   |   -    |
  264. +-------------+-----------+----------+--------+----------+--------+
  265. |             |   Byte    |    -     |   4+   |    -     |   8+   |
  266. |  BTST       +-----------+----------+--------+----------+--------+
  267. |             |   Long    |    6*    |   -    |    10    |   -    |
  268. +-------------+-----------+----------+--------+----------+--------+
  269. + add effective address calculation time
  270. * indicates maximum value; data addressing mode only
  271.  
  272.  
  273. Conditional Instruction Execution Times
  274. +-------------+-------------------+--------+-----------+
  275. |             |                   | Branch |  Branch   |
  276. | Instruction |   Displacement    | Taken  | Not Taken |
  277. +-------------+-------------------+--------+-----------+
  278. |             |       Byte        |   10   |     8     |
  279. |  Bcc        +-------------------+--------+-----------+
  280. |             |       Word        |   10   |    12     |
  281. +-------------+-------------------+--------+-----------+
  282. |             |       Byte        |   10   |     -     |
  283. |  BRA        +-------------------+--------+-----------+
  284. |             |       Word        |   10   |     -     |
  285. +-------------+-------------------+--------+-----------+
  286. |             |       Byte        |   18   |     -     |
  287. |  BSR        +-------------------+--------+-----------+
  288. |             |       Word        |   18   |     -     |
  289. +-------------+-------------------+--------+-----------+
  290. |             |      cc true      |   -    |    12     |
  291. |             +-------------------+--------+-----------+
  292. |             |  cc false, Count  |        |     _     |
  293. |  DBcc       |    Not Expired    |   10   |           |
  294. |             +-------------------+--------+-----------+
  295. |             | cc false, Counter |   _    |           |
  296. |             |      Expired      |        |    14     |
  297. +-------------+-------------------+--------+-----------+
  298.  
  299.  
  300. JMP, JSR, LEA, PEA, and MOVEM Instruction Execution Times
  301. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  302. | Instr  | Size | (An)  | (An)+ |-(An) |(d16,An)|(d8,An,Xn)+|(xxx).W|(xxx).L|(d16,PC)|(d8,PC,Xn)*|
  303. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  304. |  JMP   |  -   |   8   |   -   |  -   |   10   |    14     |  10   |  12   |   10   |    14     |
  305. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  306. |  JSR   |  -   |  16   |   -   |  -   |   18   |    22     |  18   |  20   |   18   |    22     |
  307. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  308. |  LEA   |  -   |   4   |   -   |  -   |   8    |    12     |   8   |  12   |   8    |    12     |
  309. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  310. |  PEA   |  -   |  12   |   -   |  -   |   16   |    20     |  16   |  20   |   16   |    20     |
  311. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  312. |        | Word | 12+4n | 12+4n |  _   | 16+4n  |   18+4n   | 16+4n | 20+4n | 16+4n  |   18+4n   |
  313. |        |      |       |       |      |        |           |       |       |        |           |
  314. |  MOVEM +------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  315. |  M->R  | Long | 12+8n | 12+8n |  _   | 16+8n  |   18+8n   | 16+8n | 20+8n | 16+8n  |   18+8n   |
  316. |        |      |       |       |      |        |           |       |       |        |           |
  317. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  318. |        | Word |  8+4n |   _   | 8+4n | 12+4n  |   14+4n   | 12+4n | 16+4n |   _    |     _     |
  319. |        |      |       |       |      |        |           |       |       |        |           |
  320. |  MOVEM +------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  321. |  R->M  | Long |  8+8n |   _   | 8+8n | 12+8n  |   14+8n   | 12+8n | 16+8n |   _    |     _     |
  322. |        |      |       |       |      |        |           |       |       |        |           |
  323. +--------+------+-------+-------+------+--------+-----------+-------+-------+--------+-----------+
  324. n is the number of registers to move.
  325. * The size of the index register (Xn) does not affect the instruction's execution time.
  326.  
  327.  
  328. Multi-Precision Instruction Execution Times
  329. Dn - Data register operand
  330. M  - Memory operand
  331. +-------------+-----------+----------+--------+
  332. | Instruction |   Size    | op Dn,Dn | op M,M |
  333. +-------------+-----------+----------+--------+
  334. |             | Byte,Word |    4     |   18   |
  335. |  ADDX       +-----------+----------+--------+
  336. |             |   Long    |    8     |   30   |
  337. +-------------+-----------+----------+--------+
  338. |             | Byte,Word |    -     |   12   |
  339. |  CMPM       +-----------+----------+--------+
  340. |             |   Long    |    -     |   20   |
  341. +-------------+-----------+----------+--------+
  342. |             | Byte,Word |    4     |   18   |
  343. |  SUBX       +-----------+----------+--------+
  344. |             |   Long    |    8     |   30   |
  345. +-------------+-----------+----------+--------+
  346. |  ABCD       |   Byte    |    6     |   18   |
  347. +-------------+-----------+----------+--------+
  348. |  SBCD       |   Byte    |    6     |   18   |
  349. +-------------+-----------+----------+--------+
  350.  
  351.  
  352. Miscellaneous Instruction Execution Times
  353. +----------------+-----------+----------+--------+
  354. |  Instruction   |   Size    | Register | Memory |
  355. +----------------+-----------+----------+--------+
  356. |  ANDI to CCR   |   Byte    |    20    |   -    |
  357. +----------------+-----------+----------+--------+
  358. |  ANDI to SR    |   Word    |    20    |   -    |
  359. +----------------+-----------+----------+--------+
  360. |  CHK (No Trap) |     -     |    10+   |   -    |
  361. +----------------+-----------+----------+--------+
  362. |  EORI to CCR   |   Byte    |    20    |   -    |
  363. +----------------+-----------+----------+--------+
  364. |  EORI to SR    |   Word    |    20    |   -    |
  365. +----------------+-----------+----------+--------+
  366. |  ORI to CCR    |   Byte    |    20    |   -    |
  367. +----------------+-----------+----------+--------+
  368. |  ORI to SR     |   Word    |    20    |   -    |
  369. +----------------+-----------+----------+--------+
  370. |  MOVE from SR  |     -     |    6     |   8+   |
  371. +----------------+-----------+----------+--------+
  372. |  MOVE to CCR   |     -     |    12    |   12+  |
  373. +----------------+-----------+----------+--------+
  374. |  MOVE to SR    |     -     |    6     |   12+  |
  375. +----------------+-----------+----------+--------+
  376. |  EXG           |     -     |    6     |   -    |
  377. +----------------+-----------+----------+--------+
  378. |                |   Word    |    4     |   -    |
  379. |  EXT           +-----------+----------+--------+
  380. |                |   Word    |    4     |   -    |
  381. +----------------+-----------+----------+--------+
  382. |  LINK          |     -     |    16    |   -    |
  383. +----------------+-----------+----------+--------+
  384. |  MOVE from USP |     -     |    4     |   -    |
  385. +----------------+-----------+----------+--------+
  386. |  MOVE to USP   |     -     |    4     |   -    |
  387. +----------------+-----------+----------+--------+
  388. |  NOP           |     -     |    4     |   -    |
  389. +----------------+-----------+----------+--------+
  390. |  RESET         |     -     |   132    |   -    |
  391. +----------------+-----------+----------+--------+
  392. |  RTE           |     -     |    20    |   -    |
  393. +----------------+-----------+----------+--------+
  394. |  RTR           |     -     |    20    |   -    |
  395. +----------------+-----------+----------+--------+
  396. |  RTS           |     -     |    16    |   -    |
  397. +----------------+-----------+----------+--------+
  398. |  STOP          |     -     |    4     |   -    |
  399. +----------------+-----------+----------+--------+
  400. |  SWAP          |     -     |    4     |   -    |
  401. +----------------+-----------+----------+--------+
  402. |  TRAPV         |     -     |    4     |   -    |
  403. +----------------+-----------+----------+--------+
  404. |  UNLK          |     -     |    12    |   -    |
  405. +----------------+-----------+----------+--------+
  406. + add effective address calculation time
  407.  
  408.  
  409. Move Peripheral Instruction Execution Times
  410. +-------------+------+------------------+------------------+
  411. | Instruction | Size | Register->Memory | Memory->Register |
  412. +-------------+------+------------------+------------------+
  413. |             | Word |        16        |        16        |
  414. |  MOVEP      +------+------------------+------------------+
  415. |             | Long |        24        |        24        |
  416. +-------------+------+------------------+------------------+
  417.  
  418.  
  419. Exeption Processing Execution Times
  420. +-----------------------+---------+
  421. |       Exception       | Periods |
  422. +-----------------------+---------+
  423. | Address Error         |   50    |
  424. +-----------------------+---------+
  425. | Bus Error             |   50    |
  426. +-----------------------+---------+
  427. | CHK Instruction       |   40+   |
  428. +-----------------------+---------+
  429. | Divide by Zero        |   38+   |
  430. +-----------------------+---------+
  431. | Illegal Instruction   |   34    |
  432. +-----------------------+---------+
  433. | Interrupt             |   44*   |
  434. +-----------------------+---------+
  435. | Privilege Violation   |   34    |
  436. +-----------------------+---------+
  437. | _____                 |         |
  438. | RESET**               |   40    |
  439. +-----------------------+---------+
  440. | Trace                 |   34    |
  441. +-----------------------+---------+
  442. | TRAP Instruction      |   34    |
  443. +-----------------------+---------+
  444. | TRAPV Instruction     |   34    |
  445. +-----------------------+---------+
  446.  + add effective address calculation time
  447.  * The interrupt acknowledge cycle is assumed to take four clock periods
  448.                                _____     ____
  449. ** indicates the time from the RESET and HALT are first sampled as
  450.    negated to when instruction execution starts
  451.  
  452.  
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  454.